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User story #1367

Porting of Xilinx Ultrascale model to STM32

Added by André Neto over 2 years ago. Updated over 2 years ago.

Status:
Code: Impl
Priority:
Normal
Assignee:
Luca Boncagni
Target version:
-
Start date:
07.12.2022
Due date:
% Done:

0%

Estimated time:
Git branch (link):
Git merge to develop (link):
SVN commit (link/?p=rev):

Description

The objective is to develop a MARTe2 deployment model (based on the Xilinx Ultrascale model developed for the Magnetics) for an STM32 based use-case.

Of particular interest is the integration with CubeMx.

See:
- https://vcis-gitlab.f4e.europa.eu/aneto/MARTe2 (MakeStdLib*.armv8*)
- https://vcis-gitlab.f4e.europa.eu/gavon/UltrascaleSupportPack
- https://vcis-gitlab.f4e.europa.eu/aneto/55A0Magnetics/-/tree/master/Configurations/Ultrascale

The work will be completed with:
- All the glue (Makefiles, porting, etc) to be integrated in the MARTe2 main repository
- Detailed instructions on how to build an example that can be released with the main MARTe2 documentation

History

#1 Updated by André Neto over 2 years ago

  • Status changed from New to Code: Impl

#2 Updated by André Neto over 2 years ago

  • Assignee set to Luca Boncagni

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