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Architecture definition V1.0

Due in 30 days (30.06.2025)

Definition of the architecure of the FSM migrated to PLC, changes in HW, SW and signals

79%

11 issues   (6 closed — 5 open)

Related issues
User story #2551: Check code in PLC and compare it with gitlab code
User story #2552: Migration of present RF PLC code from step 7 classic to TIA Portal
User story #2553: Provide datasheets of PS of RF system
User story #2554: Review documentation of present control system of RF
User story #2561: Review datasheets of PS of RF system and check code of managers
User story #2562: Deliverable first task plan
User story #2592: Define communications between PLC and EPICS avoiding the use of the microbox
User story #2593: identify all signals used in the State Machine: oirigin, destination and functionality
User story #2594: Frist draft of State Machine to be implemented inPLC
User story #2650: Architecture option: add board to replace moxa communications (converter from TCP to RS485)
User story #2651: Use port CP to communicate with slaves: pre-drivers, HVPSS and PSYS. Add new board if needed

Implementation

Due in about 6 months (28.11.2025)

Release of new PLC SW in TIA Portal

No issues for this version

Tests

Due in about 9 months (27.02.2026)

Tests and deployment in Rokkasho

No issues for this version