User story #815
Migrate signal generator to Labview
Start date:
22.04.2021
Due date:
% Done:
0%
Estimated time:
Git branch (link):
Git merge to develop (link):
SVN commit (link/?p=rev):
Description
Migrate signal generator to Labview
History
#1 Updated by Katarina Cindric almost 4 years ago
- Assignee deleted (
Pedro Lourenco)
#2 Updated by Pedro Lourenco over 3 years ago
Signal generator (InputEmulator) successfully deployed in Labview and already in use for FLSTestBench InputStage tests.
Please see the following links:
Please see the following links:
- Source Code - https://vcis-gitlab.f4e.europa.eu/plourenco/flstestbench/-/tree/fls_v0.4.1/Firmware/Xilinx/PulseGenerator
- LabView FPGA Project - https://vcis-svn.f4e.europa.eu/svn/52EC-FLS/tags/fls_v0.4.1/LabViewFPGA/FLSTestBenchFirmwares/NI9157__Tag_Fls_v0_4_1__InputStage
- FLSTestBench FLSInterface - https://vcis-gitlab.f4e.europa.eu/plourenco/flstestbench/-/blob/fls_v0.4.1/Software/MARTe2/Source/Components/Interfaces/FLSInterface/FLSInterface.h
- FLSTestBench FlsInputStageTests - https://vcis-gitlab.f4e.europa.eu/plourenco/flstestbench/-/blob/fls_v0.4.1/Software/MARTe2/Test/IntegrationTests/FlsInputStage/FlsInputStageTest.h
#3 Updated by Katarina Cindric over 3 years ago
- Status changed from New to Arch: Rev
#4 Updated by Katarina Cindric over 3 years ago
- Status changed from Arch: Rev to Unit: Rev
#5 Updated by Katarina Cindric over 3 years ago
- Assignee set to Katarina Cindric