over 3 years late (14.05.2021)
The purpose of the test bench is to communicate via UART with the Labview PLC interface
83%
12 issues
(10 closed
—
2 open)
over 3 years late (02.07.2021)
The purpose of the test bench is to test the full FLS register map
75%
4 issues
(3 closed
—
1 open)
over 3 years late (13.08.2021)
The purpose of the test bench is to test the input stage
0%
2 issues
(0 closed
—
2 open)
over 3 years late (03.09.2021)
The purpose of the test bench is to test the LFBs
0%
2 issues
(0 closed
—
2 open)
Test purpose of the test bench is to test the bypass functionality
0%
2 issues
(0 closed
—
2 open)
The purpose of the test bench is to test the output stage
0%
4 issues
(0 closed
—
4 open)