User story #816
Migrate probe to Labview
Start date:
22.04.2021
Due date:
% Done:
0%
Estimated time:
Git branch (link):
Git merge to develop (link):
SVN commit (link/?p=rev):
Description
Migrate probe to Labview
History
#1 Updated by Katarina Cindric almost 4 years ago
- Assignee deleted (
Pedro Lourenco)
#2 Updated by Pedro Lourenco over 3 years ago
The VHDL Module Pulse Probe (a.k.a Output Detector) been successfully developed, tested and migrated into LabView FPGA, currently being used in the FLSTestBench Tests for release/tag v0.7.x. Please find additional information here:
- Commit Tag - https://vcis-gitlab.f4e.europa.eu/plourenco/flstestbench/-/commit/6d37d240423e5d9b5bd08676912088f6be6f9daf
- Source Code - https://vcis-gitlab.f4e.europa.eu/plourenco/flstestbench/-/tree/master/Firmware/Xilinx/PulseProbe
- LabView Deployment - https://vcis-svn.f4e.europa.eu/svn/52EC-FLS/tags/fls_v0.7.0/LabViewFPGA/FLSTestBenchFirmwares/NI9157__Tag_Fls_v0_7_0__OutputStage/output_detector/
#3 Updated by Katarina Cindric over 3 years ago
- Status changed from New to Arch: Rev
#4 Updated by Katarina Cindric over 3 years ago
- Status changed from Arch: Rev to Unit: Rev
#5 Updated by Katarina Cindric over 3 years ago
- Assignee set to Katarina Cindric