Fast Logic Solver Test-bench

05.10.2021

19:20 User story #953: Test FLS v0.5.0 against FLS v0.5.0 test bench

FLS tag 'fls_v0.5.0' successfully tested using FLSTestBench v0.5.0.
Test result report: Issue detected - Configuri... Pedro Lourenco

15:59 User story #953 (Code: Impl): Test FLS v0.5.0 against FLS v0.5.0 test bench

Katarina Cindric

15:56 User story #953 (Unit: Rev): Test FLS v0.5.0 against FLS v0.5.0 test bench

Test FLS v0.5.0 against FLS v0.5.0 test bench Katarina Cindric

19:14 User story #816: Migrate probe to Labview

The VHDL Module Pulse Probe (a.k.a Output Detector) been successfully developed, tested and migrated into LabView FPG... Pedro Lourenco

19:08 User story #956: Test FLS v0.7.0 against FLS v0.7.0 test bench

FLS tag 'fls_v0.7.0' successfully tested using FLSTestBench v0.7.0.
Test result report: Basic TB tests passed - Ne... Pedro Lourenco

16:00 User story #956 (Code: Impl): Test FLS v0.7.0 against FLS v0.7.0 test bench

Katarina Cindric

15:57 User story #956 (Unit: Rev): Test FLS v0.7.0 against FLS v0.7.0 test bench

Test FLS v0.7.0 against FLS v0.7.0 test bench Katarina Cindric

19:05 User story #958: Develop FLS v0.7.1 test bench

FLSTestBench for FLS release fls_v0.7.1 successfully created with all basic testcases covered.
Additional minor modi... Pedro Lourenco

16:00 User story #958 (Code: Impl): Develop FLS v0.7.1 test bench

Katarina Cindric

15:58 User story #958 (Unit: Rev): Develop FLS v0.7.1 test bench

Correct expected output debug behavior - the output to debug will not be related to the type of output, the same logi... Katarina Cindric

19:03 User story #954: Test FLS v0.6.0 against FLS v0.6.0 test bench

FLS tag 'fls_v0.6.0' successfully tested using FLSTestBench v0.6.0.
Test result report: TB tests passed. All speci... Pedro Lourenco

15:59 User story #954 (Code: Impl): Test FLS v0.6.0 against FLS v0.6.0 test bench

Katarina Cindric

15:56 User story #954 (Unit: Rev): Test FLS v0.6.0 against FLS v0.6.0 test bench

Test FLS v0.6.0 against FLS v0.6.0 test bench- bypass functionality Katarina Cindric

18:59 User story #957: Develop FLS v0.7.0 test bench

FLSTestBench for FLS release fls_v0.7.0 successfully created with all basic testcases covered.
Additional minor modi... Pedro Lourenco

15:59 User story #957 (Code: Impl): Develop FLS v0.7.0 test bench

Katarina Cindric

15:58 User story #957 (Unit: Rev): Develop FLS v0.7.0 test bench

Develop FLS v0.7.0 test bench Katarina Cindric

18:57 User story #955: Develop FLS v0.6.0 test bench

FLSTestBench for FLS release fls_v0.6.0 successfully created with all the required (foreseen) testcases covered.
Add... Pedro Lourenco

15:59 User story #955 (Code: Impl): Develop FLS v0.6.0 test bench

Katarina Cindric

15:57 User story #955 (Unit: Rev): Develop FLS v0.6.0 test bench

Develop FLS v0.6.0 test bench Katarina Cindric

16:00 User story #959 (Code: Impl): Test FLS v0.7.1 against FLS v0.7.1 test bench

Katarina Cindric

15:59 User story #959 (Unit: Rev): Test FLS v0.7.1 against FLS v0.7.1 test bench

Test the corrected firmware where the output to debug logic is such that it does not take into account the output type. Katarina Cindric

15:54 User story #935 (Unit: Rev): Develop FLS v0.5.0 test bench

Katarina Cindric

15:54 User story #934 (Unit: Rev): Test FLS v0.4.1 against FLS v0.4.0 test bench

Katarina Cindric