Activity
From 03.06.2021 to 02.07.2021
29.06.2021
- 18:02 User story #893: Test FLS v0.2.1 against FLS v0.2.0 test bench
- Objective successfully achieved.
Tag v0.2.1 - TB tests passed. The fls_v0.2.1 release does not implement the regis... - 17:51 User story #893 (Arch: Rev): Test FLS v0.2.1 against FLS v0.2.0 test bench
- 17:50 User story #893 (Closed): Test FLS v0.2.1 against FLS v0.2.0 test bench
- Issue detected - read operations on standard registers only allowed in STATE_CONFIG. It should be possible to read an...
- 17:59 User story #892: Test FLS v0.2.0 against FLS v0.2.0 test bench
- Objective successfully achieved.
Tag v0.2.0 - Issue detected - read operations on standard registers only allowed ... - 17:51 User story #892 (Arch: Rev): Test FLS v0.2.0 against FLS v0.2.0 test bench
- 17:49 User story #892 (Closed): Test FLS v0.2.0 against FLS v0.2.0 test bench
- Test FLS v0.2.0 against FLS v0.2.0 test bench
- 17:51 User story #895 (Arch: Rev): Test FLS v0.3.0 against FLS v0.3.0 test bench
- 17:51 User story #895 (Arch: Impl): Test FLS v0.3.0 against FLS v0.3.0 test bench
- 17:51 User story #895 (Closed): Test FLS v0.3.0 against FLS v0.3.0 test bench
- Test FLS v0.3.0 against FLS v0.3.0 test bench
- 17:51 User story #894 (Arch: Rev): Develop FLS v0.3.0 test bench
- 17:50 User story #894 (Closed): Develop FLS v0.3.0 test bench
- Develop test bench to test the full register map of the FLS
- 17:46 User story #880 (Closed): PLC interface v0.1.0 integrated test with MARTe2 app
- 17:45 User story #845 (Closed): Loopback UART test with C code and Labview
- 17:45 User story #817 (Closed): Simple C app to test UART
- 17:44 User story #812 (Closed): Test UART in ISE in loop-back form
- 17:44 User story #867 (Closed): PLC interface integrated test with MARTe2 app
- 17:42 User story #881 (Unit: Rev): Test FLS v0.1.0 against FLS test bench with the test cases
15.06.2021
- 21:07 User story #881: Test FLS v0.1.0 against FLS test bench with the test cases
- Test for FLS tag 'fls v0.1.0' implemented in MARTe2: [[https://vcis-gitlab.f4e.europa.eu/plourenco/flstestbench/-/com...
- 18:30 User story #881 (Arch: Rev): Test FLS v0.1.0 against FLS test bench with the test cases
- 18:30 User story #881 (Closed): Test FLS v0.1.0 against FLS test bench with the test cases
- - write and read to and from a register (with and without increment combinations)
- 20:42 User story #867: PLC interface integrated test with MARTe2 app
- Migrated the simple C application used to test the UART loopback firmware into MARTe2 GTests: [[https://vcis-gitlab.f...
- 18:18 User story #867 (Unit: Rev): PLC interface integrated test with MARTe2 app
- 18:18 User story #867 (Unit: Impl): PLC interface integrated test with MARTe2 app
- 18:14 User story #867 (Unit: Rev): PLC interface integrated test with MARTe2 app
- 20:39 User story #844: Unit test automation
- VHDL unit tests were automated using VUNIT as displayed here: [[https://vcis-gitlab.f4e.europa.eu/plourenco/flstestbe...
- 18:17 User story #844 (Unit: Rev): Unit test automation
- 20:33 User story #880: PLC interface v0.1.0 integrated test with MARTe2 app
- Released FLSTestBench tag 'plc_interface_v0.1.0' corresponding to the sucessful testing of FLS tag 'plc_interface_v0....
- 18:22 User story #880 (Unit: Rev): PLC interface v0.1.0 integrated test with MARTe2 app
- 18:21 User story #880: PLC interface v0.1.0 integrated test with MARTe2 app
- 18:21 User story #880 (Arch: Rev): PLC interface v0.1.0 integrated test with MARTe2 app
- 18:21 User story #880 (Closed): PLC interface v0.1.0 integrated test with MARTe2 app
- Test PLC interface v0.1.0 in Labview
- 20:22 User story #845: Loopback UART test with C code and Labview
- UART successfully tested in loop back using with the LabView C API based test code and LabView FPGA firmware.
[[http... - 20:18 User story #817: Simple C app to test UART
- The simple C application based on the NIFpga C API was successfully used to test the UART firmware integrated into La...
- 20:13 User story #812: Test UART in ISE in loop-back form
- The UART module developed was successfully tested using VHDL test benches in ISE with ISIM. These are currently being...
- 18:32 User story #818 (Closed): Simple C app to test signal generator
- They will not exist since the code shall be written directly in the MARTe2 app.
- 18:31 User story #819 (Closed): Simple C app to test probe
- They will not exist since the code shall be written directly in the MARTe2 app.
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