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From 12.04.2021 to 11.05.2021

11.05.2021

17:47 User story #845 (Code: Impl): Loopback UART test with C code and Labview
Katarina Cindric
17:47 User story #845 (Closed): Loopback UART test with C code and Labview
Test UART block in Labview using the simple C code app. Connect RX to TX and write and read from the module using the... Katarina Cindric
17:46 User story #817 (Code: Impl): Simple C app to test UART
Katarina Cindric
17:36 User story #817 (New): Simple C app to test UART
Katarina Cindric
17:35 User story #817 (Code: Impl): Simple C app to test UART
Katarina Cindric
17:46 User story #814 (Code: Impl): Migrate UART to Labview
Katarina Cindric
17:36 User story #814 (New): Migrate UART to Labview
Katarina Cindric
17:35 User story #814 (Code: Impl): Migrate UART to Labview
Katarina Cindric
17:45 User story #813 (New): Test pulse/probe in ISE in loopback mode
Katarina Cindric
17:30 User story #844 (Code: Impl): Unit test automation
Katarina Cindric
17:30 User story #844 (Unit: Rev): Unit test automation
Look for a way to automatize the execution of multiple unit tests of a unit under test, e.g. probe.
Katarina Cindric
17:28 User story #811 (Closed): Clean-up of probe vhdl code
Katarina Cindric
17:27 User story #810 (Closed): Clean-up signal generator vhdl code
Katarina Cindric
17:27 User story #808 (Closed): Labview project with UART and probe/pulse and FIFOs
It was tested with 1 UART, 1 probe module, 1 pulse module and the FIFOs needed for MXI communication. Memory usage ve... Katarina Cindric

05.05.2021

08:34 User story #813 (Code: Impl): Test pulse/probe in ISE in loopback mode
Katarina Cindric
08:34 User story #813 (Arch: Rev): Test pulse/probe in ISE in loopback mode
Katarina Cindric
08:34 User story #812 (Code: Impl): Test UART in ISE in loop-back form
Katarina Cindric

22.04.2021

19:16 User story #811 (Code: Impl): Clean-up of probe vhdl code
Katarina Cindric
19:13 User story #811 (Closed): Clean-up of probe vhdl code
Clean-up of probe vhdl code Katarina Cindric
19:16 User story #810 (Code: Impl): Clean-up signal generator vhdl code
Katarina Cindric
19:13 User story #810 (Closed): Clean-up signal generator vhdl code
Clean-up signal generator vhdl code Katarina Cindric
19:16 User story #809 (Code: Impl): Clean-up UART module
Katarina Cindric
19:13 User story #809 (Closed): Clean-up UART module
Clean-up UART module Katarina Cindric
19:16 User story #808 (Code: Impl): Labview project with UART and probe/pulse and FIFOs
Katarina Cindric
19:12 User story #808 (Closed): Labview project with UART and probe/pulse and FIFOs
Create Labview project with current versions of the UART, pulse and probe modules. Add the necessary 3 FIFOs and regi... Katarina Cindric
19:16 User story #819 (Closed): Simple C app to test probe
Simple C app to test probe Katarina Cindric
19:16 User story #818 (Closed): Simple C app to test signal generator
Simple C app to test signal generator Katarina Cindric
19:15 User story #817 (Closed): Simple C app to test UART
Simple C app to test UART Katarina Cindric
19:15 User story #816 (Unit: Rev): Migrate probe to Labview
Migrate probe to Labview Katarina Cindric
19:15 User story #815 (Unit: Rev): Migrate signal generator to Labview
Migrate signal generator to Labview Katarina Cindric
19:14 User story #814 (Closed): Migrate UART to Labview
Migrate UART to Labview Katarina Cindric
19:14 User story #813 (Arch: Rev): Test pulse/probe in ISE in loopback mode
Test pulse/probe in ISE in loopback mode Katarina Cindric
19:14 User story #812 (Closed): Test UART in ISE in loop-back form
Test UART in ISE in loop-back form Katarina Cindric
 

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